When You Rise Up

Mixed-signal VLSI topics can provide students with exposure to analog and digital circuit interactions.

Sigma-Delta ADC

The Sigma Delta ADC Verilog project explores digital implementation aspects of a sigma-delta analog-to-digital conversion architecture.

High-Speed Comparator

The High Speed Comparator Design Cadence project focuses on comparator architecture and high-speed circuit simulation.

VCO

The VCO Design and Simulation VLSI project explores voltage-controlled oscillator design and simulation.

PLL

The Phase Locked Loop PLL FPGA Project project introduces phase-locking concepts and hardware implementation.